Design of Cost-Efficient Interconnect Processing Units
Giuseppe (STMicroelectronics, Grenoble, France) Maruccia, Lorenzo (STMicroelectronics, Grenoble, France) Pieralisi, Marcello (STMicroelectronics, Grenoble, France) Coppola, Miltos D. (ISD SA, Heraklion, Greece) Grammatikakis, Riccardo (STMicroelectronics, Grenoble Cedex, France) Locatelli
Taylor & Francis Inc, 2008
220,75 €On orderDelivery: 2-3 weeks
Written by leading experts in the field, Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC comprehensively examines the current state-of-the-art and future trends in multiprocessor system-on-chip (MPSoC), in particular network-on-chip (NoC) design.
- ISBN-13
- 9781420044713
- ISBN-10
- 1420044710
- Publisher
- Taylor & Francis Inc
- Year
- 2008
- Publication date
- 2008-09-17
- Pages
- 288
- Dimensions
- 234x156x
- Weight
- 657