Tradeoffs and Optimization in Analog CMOS Design
David (University of North Carolina, USA) Binkley
John Wiley & Sons Inc, 2008
150,50 €On orderDelivery: 2-3 weeks
Optimizing Analog CMOS Design presents methods for the optimized design of analog CMOS circuits through the design choices of Metal-Oxide Semiconductor Field-Effect Transistor device drain current, inversion level, and channel length.
- ISBN-13
- 9780470031360
- ISBN-10
- 0470031360
- Publisher
- John Wiley & Sons Inc
- Year
- 2008
- Publication date
- 2008-06-27
- Pages
- 632
- Dimensions
- 176x253x39
- Weight
- 1168